26 #include "Banks/Bank.h"
27 #include "Banks/IOBank.h"
28 #include "Banks/ColorRAMBank.h"
29 #include "Banks/DisconnectedBusBank.h"
30 #include "Banks/SidBank.h"
31 #include "Banks/ExtraSidBank.h"
33 #include "sidplayfp/c64/c64env.h"
34 #include "sidplayfp/c64/c64cpu.h"
35 #include "sidplayfp/c64/c64cia.h"
36 #include "sidplayfp/c64/c64vic.h"
37 #include "sidplayfp/c64/mmu.h"
50 virtual void load(
const char *) =0;
124 static double getCpuFreq(
model_t model);
133 uint8_t cpuRead(uint_least16_t addr) {
return mmu.
cpuRead(addr); }
141 void cpuWrite(uint_least16_t addr, uint8_t data) { mmu.
cpuWrite(addr, data); }
150 inline void interruptIRQ(
bool state);
157 inline void interruptNMI() { cpu.
triggerNMI (); }
162 inline void interruptRST() { cpu.
triggerRST (); }
171 inline void setBA(
bool state);
173 inline void lightpen() { vic.lightpen (); }
175 #ifdef PC64_TESTSUITE
178 void loadFile(
const char *file)
190 #ifdef PC64_TESTSUITE
191 void setTestEnv(testEnv *env)
207 void debug(
bool enable, FILE *out) { cpu.debug (enable, out); }
210 void resetCpu() { cpu.
reset(); }
217 void setRoms(
const uint8_t* kernal,
const uint8_t* basic,
const uint8_t* character)
219 mmu.setRoms(kernal, basic, character);
265 sidmemory *getMemInterface() {
return &mmu; }
267 uint_least16_t getCia1TimerA()
const {
return cia1.getTimerA(); }
270 void c64::interruptIRQ (
bool state)
287 void c64::setBA (
bool state)
290 if ((state ^ oldBAState) ==
false)