PIC18C858 |
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CONFIG1L (address:0x300000, mask:0xFF) |
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CP -- Code Protection bits |
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CP = ON |
0x00 |
All of program memory code protected. |
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CP = OFF |
0xFF |
Program memory code protection off. |
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CONFIG1H (address:0x300001, mask:0xE7) |
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OSC -- Oscillator Selection bits |
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OSC = LP |
0xF8 |
LP oscillator. |
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OSC = XT |
0xF9 |
XT oscillator. |
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OSC = HS |
0xFA |
HS oscillator. |
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OSC = RC |
0xFB |
RC oscillator. |
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OSC = EC |
0xFC |
EC oscillator w/ OSC2 configured as divide by 4 clock output. |
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OSC = ECIO |
0xFD |
EC oscillator w/ OSC2 configured as RA6. |
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OSC = HSPLL |
0xFE |
HS4 oscillator with PLL enabled/Clock frequency = (4 x Fosc). |
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OSC = RCIO |
0xFF |
RC oscillator w/ OSC2 configured as RA6. |
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OSCS -- Oscillator System Clock Switch Enable bit |
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OSCS = ON |
0xDF |
Oscillator system clock switch option is enabled (Oscillator switching is enabled). |
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OSCS = OFF |
0xFF |
Oscillator system clock switch option is disabled (Main oscillator is source). |
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CONFIG2L (address:0x300002, mask:0x0F) |
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PWRT -- Power-up Timer Enable bit |
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PWRT = ON |
0xFE |
PWRT enabled. |
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PWRT = OFF |
0xFF |
PWRT disabled. |
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BOR -- Brown-out Reset Enable bit |
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BOR = OFF |
0xFD |
Brown-out Reset disabled. |
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BOR = ON |
0xFF |
Brown-out Reset enabled. |
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BORV -- Brown-out Reset Voltage bits |
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BORV = 45 |
0xF3 |
VBOR set to 4.5V. |
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BORV = 42 |
0xF7 |
VBOR set to 4.2V. |
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BORV = 27 |
0xFB |
VBOR set to 2.7V. |
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BORV = 25 |
0xFF |
VBOR set to 2.5V. |
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CONFIG2H (address:0x300003, mask:0x0F) |
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WDT -- Watchdog Timer Enable bit |
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WDT = OFF |
0xFE |
WDT disabled (control is placed on the SWDTEN bit). |
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WDT = ON |
0xFF |
WDT enabled. |
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WDTPS -- Watchdog Timer Postscale Select bits |
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WDTPS = 1 |
0xF1 |
1:1. |
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WDTPS = 2 |
0xF3 |
1:2. |
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WDTPS = 4 |
0xF5 |
1:4. |
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WDTPS = 8 |
0xF7 |
1:8. |
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WDTPS = 16 |
0xF9 |
1:16. |
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WDTPS = 32 |
0xFB |
1:32. |
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WDTPS = 64 |
0xFD |
1:64. |
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WDTPS = 128 |
0xFF |
1:128. |
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CONFIG4L (address:0x300006, mask:0x03) |
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STVR -- Stack Full/Underflow RESET Enable bit |
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STVR = OFF |
0xFE |
Stack Full/Underflow will not cause RESET. |
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STVR = ON |
0xFF |
Stack Full/Underflow will cause RESET. |
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