PIC16F882 |
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CONFIG1 (address:0x2007, mask:0xFFFF) |
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FOSC -- Oscillator Selection bits |
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FOSC = LP |
0x3FF8 |
LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN. |
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FOSC = XT |
0x3FF9 |
XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN. |
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FOSC = HS |
0x3FFA |
HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN. |
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FOSC = EC |
0x3FFB |
EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN. |
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FOSC = INTRC_NOCLKOUT |
0x3FFC |
INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN. |
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FOSC = INTRC_CLKOUT |
0x3FFD |
INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN. |
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FOSC = EXTRC_NOCLKOUT |
0x3FFE |
RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN. |
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FOSC = EXTRC_CLKOUT |
0x3FFF |
RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN. |
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WDTE -- Watchdog Timer Enable bit |
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WDTE = OFF |
0x3FF7 |
WDT disabled and can be enabled by SWDTEN bit of the WDTCON register. |
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WDTE = ON |
0x3FFF |
WDT enabled. |
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PWRTE -- Power-up Timer Enable bit |
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PWRTE = ON |
0x3FEF |
PWRT enabled. |
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PWRTE = OFF |
0x3FFF |
PWRT disabled. |
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MCLRE -- RE3/MCLR pin function select bit |
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MCLRE = OFF |
0x3FDF |
RE3/MCLR pin function is digital input, MCLR internally tied to VDD. |
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MCLRE = ON |
0x3FFF |
RE3/MCLR pin function is MCLR. |
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CP -- Code Protection bit |
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CP = ON |
0x3FBF |
Program memory code protection is enabled. |
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CP = OFF |
0x3FFF |
Program memory code protection is disabled. |
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CPD -- Data Code Protection bit |
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CPD = ON |
0x3F7F |
Data memory code protection is enabled. |
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CPD = OFF |
0x3FFF |
Data memory code protection is disabled. |
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BOREN -- Brown Out Reset Selection bits |
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BOREN = OFF |
0x3CFF |
BOR disabled. |
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BOREN = SBODEN |
0x3DFF |
BOR controlled by SBOREN bit of the PCON register. |
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BOREN = NSLEEP |
0x3EFF |
BOR enabled during operation and disabled in Sleep. |
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BOREN = ON |
0x3FFF |
BOR enabled. |
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IESO -- Internal External Switchover bit |
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IESO = OFF |
0x3BFF |
Internal/External Switchover mode is disabled. |
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IESO = ON |
0x3FFF |
Internal/External Switchover mode is enabled. |
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FCMEN -- Fail-Safe Clock Monitor Enabled bit |
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FCMEN = OFF |
0x37FF |
Fail-Safe Clock Monitor is disabled. |
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FCMEN = ON |
0x3FFF |
Fail-Safe Clock Monitor is enabled. |
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LVP -- Low Voltage Programming Enable bit |
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LVP = OFF |
0x2FFF |
RB3 pin has digital I/O, HV on MCLR must be used for programming. |
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LVP = ON |
0x3FFF |
RB3/PGM pin has PGM function, low voltage programming enabled. |
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DEBUG -- In-Circuit Debugger Mode bit |
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DEBUG = ON |
0x1FFF |
In_Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger. |
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DEBUG = OFF |
0x3FFF |
In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins. |
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CONFIG2 (address:0x2008, mask:0xFFFF) |
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BOR4V -- Brown-out Reset Selection bit |
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BOR4V = BOR21V |
0x3EFF |
Brown-out Reset set to 2.1V. |
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BOR4V = BOR40V |
0x3FFF |
Brown-out Reset set to 4.0V. |
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WRT -- Flash Program Memory Self Write Enable bits |
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WRT = HALF |
0x39FF |
0000h to 03FFh write protected, 0400h to 07FFh may be modified by EECON control. |
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WRT = 1FOURTH |
0x3BFF |
0000h to 00FFh write protected, 0100h to 07FFh may be modified by EECON control. |
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WRT = OFF |
0x3FFF |
Write protection off. |
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